mirror of
https://github.com/ggml-org/llama.cpp.git
synced 2026-09-17 20:31:47 +02:00
Max KrasnyanskyandAlexander Lu
eafe15a5e3
* hex-row-split: add support for multi-device row spliting Co-authored-by: Max Krasnyansky <maxk@qti.qualcomm.com> * hex-mdev: add work splitting to fused kernels * hex-mdev: use mdev_ prefix for all multi-device state * hex-mdev: make device configuration more expressive to support device groups * hex-mdev: fix mdev session init * hex-mdev: fused nx (2x,3x) matmuls must update row counts for each w/o * hex-mdev: fix MUL_MAT work partitioning bugs introduced by mdev * hex-cont: fix crashes with new tests due to wrong striding * hex-mdev: move fences after l2flushes * hex-cont: fix work splitting for mnpu -- align chunks to cachelines * hex-mdev: fix CPY tests with multi-dev * hex-mmid: fix work partitioning with mnpu * hex-mm: fix test failures with mdev * hex-binary: fix work partitioning for mdev * hex-argsort: fix mdev partitioning * hex-mdev: fix work partitioning and general updates for all simple ops * hex-fa: fix mdev work splitting issues * hex-mdev: fixing more failing ops test * hex-mdev: update the rest of the ops * hex-mdev: refactor all mdev splitting logic to be contained within if (mdev_count > 1) {...} * hex-mdev: fix macros * hex-mdev: simplify session flush logic * hex-sync: fix recursion in session flush * hex-mdev: factor out fence buffer and allocator * hex-fence: make fence allocation more robust with reserved slots for mdev * hex-mdev: keep all mdev state in htp_mdev_group * hex-mdev: further cleanup mdev group handling at the host * hex-mdev: update group idx in the opbatch before serializing * hex-batch: remove separate op_pending and use batch_req/rsp_seq * hex-async: workaround another missing tensor_init in ggml-meta * hex-fence: cleanup and robustify fences and error handling in multi-device scenarios * hex-ar: improve ALLREDUCE error handling * hex-async: robust error handling for op_cpy_fence * hex-async: use seq0 from allreduce context to allocate fence_seq * hex-mdev: fix remaining issues with fence and barrier clearing in CPY_FENCE * hex-misc: realign macros and fix misplaces trace events * hex-misc: align macros * hex-mdev: fix unclone buffer re-entrancy * hex-glu: fix mdev partitioning logic * hex-mdev: make buffer uncloning/cleanup work with tensor-split scenarios * hex-mdev: tighten up the can_split check in act-ops * hex-mdev: factor out common bits of the partitioning logic * hex-mm: minor realignment of the macros * hex-bufs: fix incorrectly placed assert for MAX_BUFS * hex-pad: tighten up gating checks for PAD * hex-kparams: make sure all kernels properly use kparams->n_threads * hex-docs: update user and developer docs with new features and detailed guide for ops development * hex-scripts: update run script to properly parse dev groups * hex-misc: formatting * hex-sess: minor cleanup for session init * hex-ar: fix vtcm size calc in allreduce kparams * hex-scripts: fix flake8 warnings * hex-rope: update ROPE to support mdev work split * hex-ops: remove redunant checks and minor reformat * hex-dev-guide: update dev-guide to avoid redundant null checks * hex-async: improve event_wait, event_sync and fence implementations * hex-async: remove synchronous flush from event_sync * hex-async: symplify fence recovery protocol and make sync more robust * hex-async: futher simplify error recovery for fences * hex-err: return status instead of just -1 * hex-async: print all seq nums in hex * hex-async: make sure fences flush dirty ranges * hex-async: add dirty ranges merging to reduce fence flushes * hex-async: properly sync before freeing the event * hex-async: make sure fence owner session is not overriden * hex-async: more fence write order more robust * hex-async: make sure not to fuse ALLREDUCE+ADD if their dsts overlap * hex-fusion: cleanup redundant checks --------- Co-authored-by: Alexander Lu <alexlu@qti.qualcomm.com>
200 lines
12 KiB
C
200 lines
12 KiB
C
#ifndef HVX_SCALE_H
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#define HVX_SCALE_H
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#include <assert.h>
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#include <stddef.h>
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#include <stdint.h>
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#include "hvx-base.h"
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#define hvx_scale_f32_loop_body(dst_type, src_type, vec_store) \
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do { \
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dst_type * restrict vdst = (dst_type *) dst; \
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src_type * restrict vsrc = (src_type *) src; \
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\
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HVX_Vector vs = hvx_vec_splat_f32(scale); \
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\
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const uint32_t elem_size = sizeof(float); \
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const uint32_t epv = 128 / elem_size; \
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const uint32_t nvec = n / epv; \
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const uint32_t nloe = n % epv; \
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\
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uint32_t i = 0; \
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\
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_Pragma("unroll(4)") \
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for (; i < nvec; ++i) { \
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HVX_Vector v = Q6_Vqf32_vmpy_VsfVsf(vsrc[i], vs); \
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vdst[i] = Q6_Vsf_equals_Vqf32(v); \
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} \
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if (nloe) { \
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HVX_Vector v = Q6_Vqf32_vmpy_VsfVsf(vsrc[i], vs); \
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vec_store((void *) &vdst[i], nloe * elem_size, Q6_Vsf_equals_Vqf32(v)); \
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} \
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} while(0)
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static inline void hvx_scale_f32_aa(uint8_t * restrict dst, const uint8_t * restrict src, const int n, const float scale) {
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assert((size_t) dst % 128 == 0);
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assert((size_t) src % 128 == 0);
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hvx_scale_f32_loop_body(HVX_Vector, HVX_Vector, hvx_vec_store_a);
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}
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static inline void hvx_scale_f32_au(uint8_t * restrict dst, const uint8_t * restrict src, const int n, const float scale) {
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assert((size_t) dst % 128 == 0);
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hvx_scale_f32_loop_body(HVX_Vector, HVX_UVector, hvx_vec_store_a);
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}
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static inline void hvx_scale_f32_ua(uint8_t * restrict dst, const uint8_t * restrict src, const int n, const float scale) {
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assert((size_t) src % 128 == 0);
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hvx_scale_f32_loop_body(HVX_UVector, HVX_Vector, hvx_vec_store_u);
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}
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static inline void hvx_scale_f32_uu(uint8_t * restrict dst, const uint8_t * restrict src, const int n, const float scale) {
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hvx_scale_f32_loop_body(HVX_UVector, HVX_UVector, hvx_vec_store_u);
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}
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static inline void hvx_scale_f32(uint8_t * restrict dst, const uint8_t * restrict src, const int n, const float scale) {
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if (((size_t) dst & 127) == 0) {
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if (((size_t) src & 127) == 0) {
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hvx_scale_f32_aa(dst, src, n, scale);
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} else {
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hvx_scale_f32_au(dst, src, n, scale);
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}
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} else {
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if (((size_t) src & 127) == 0) {
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hvx_scale_f32_ua(dst, src, n, scale);
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} else {
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hvx_scale_f32_uu(dst, src, n, scale);
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}
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}
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}
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#define hvx_scale_offset_f32_loop_body(dst_type, src_type, vec_store) \
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do { \
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dst_type * restrict vdst = (dst_type *) dst; \
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src_type * restrict vsrc = (src_type *) src; \
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\
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HVX_Vector vs = hvx_vec_splat_f32(scale); \
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HVX_Vector vo = hvx_vec_splat_f32(offset); \
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\
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const uint32_t elem_size = sizeof(float); \
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const uint32_t epv = 128 / elem_size; \
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const uint32_t nvec = n / epv; \
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const uint32_t nloe = n % epv; \
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\
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uint32_t i = 0; \
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\
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_Pragma("unroll(4)") \
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for (; i < nvec; ++i) { \
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HVX_Vector v = Q6_Vqf32_vadd_Vqf32Vsf(Q6_Vqf32_vmpy_VsfVsf(vsrc[i], vs), vo); \
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vdst[i] = Q6_Vsf_equals_Vqf32(v); \
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} \
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if (nloe) { \
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HVX_Vector v = Q6_Vqf32_vadd_Vqf32Vsf(Q6_Vqf32_vmpy_VsfVsf(vsrc[i], vs), vo); \
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vec_store((void *) &vdst[i], nloe * elem_size, Q6_Vsf_equals_Vqf32(v)); \
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} \
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} while(0)
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static inline void hvx_scale_offset_f32_aa(uint8_t * restrict dst, const uint8_t * restrict src, const int n, const float scale, const float offset) {
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assert((size_t) dst % 128 == 0);
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assert((size_t) src % 128 == 0);
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hvx_scale_offset_f32_loop_body(HVX_Vector, HVX_Vector, hvx_vec_store_a);
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}
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static inline void hvx_scale_offset_f32_au(uint8_t * restrict dst, const uint8_t * restrict src, const int n, const float scale, const float offset) {
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assert((size_t) dst % 128 == 0);
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hvx_scale_offset_f32_loop_body(HVX_Vector, HVX_UVector, hvx_vec_store_a);
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}
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static inline void hvx_scale_offset_f32_ua(uint8_t * restrict dst, const uint8_t * restrict src, const int n, const float scale, const float offset) {
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assert((size_t) src % 128 == 0);
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hvx_scale_offset_f32_loop_body(HVX_UVector, HVX_Vector, hvx_vec_store_u);
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}
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static inline void hvx_scale_offset_f32_uu(uint8_t * restrict dst, const uint8_t * restrict src, const int n, const float scale, const float offset) {
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hvx_scale_offset_f32_loop_body(HVX_UVector, HVX_UVector, hvx_vec_store_u);
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}
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static inline void hvx_scale_offset_f32(uint8_t * restrict dst, const uint8_t * restrict src, const int n, const float scale, const float offset) {
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if (((size_t) dst & 127) == 0) {
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if (((size_t) src & 127) == 0) {
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hvx_scale_offset_f32_aa(dst, src, n, scale, offset);
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} else {
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hvx_scale_offset_f32_au(dst, src, n, scale, offset);
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}
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} else {
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if (((size_t) src & 127) == 0) {
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hvx_scale_offset_f32_ua(dst, src, n, scale, offset);
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} else {
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hvx_scale_offset_f32_uu(dst, src, n, scale, offset);
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}
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}
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}
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// Scale+offset computed by promoting f16 -> f32, then narrowing the result back to f16.
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#define hvx_scale_offset_f16_loop_body(dst_type, src_type, vec_store) \
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do { \
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dst_type * restrict vdst = (dst_type *) dst; \
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src_type * restrict vsrc = (src_type *) src; \
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\
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HVX_Vector vs = hvx_vec_splat_f32(scale); \
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HVX_Vector vo = hvx_vec_splat_f32(offset); \
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\
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const uint32_t nvec = n / VLEN_FP16; \
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const uint32_t nloe = n % VLEN_FP16; \
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\
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uint32_t i = 0; \
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\
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_Pragma("unroll(4)") \
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for (; i < nvec; ++i) { \
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HVX_VectorPair p = hvx_vec_f16_to_f32(vsrc[i]); \
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HVX_Vector r0 = Q6_Vsf_equals_Vqf32(Q6_Vqf32_vadd_Vqf32Vsf(Q6_Vqf32_vmpy_VsfVsf(Q6_V_lo_W(p), vs), vo)); \
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HVX_Vector r1 = Q6_Vsf_equals_Vqf32(Q6_Vqf32_vadd_Vqf32Vsf(Q6_Vqf32_vmpy_VsfVsf(Q6_V_hi_W(p), vs), vo)); \
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vdst[i] = hvx_vec_f32_to_f16(r0, r1); \
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} \
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if (nloe) { \
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HVX_VectorPair p = hvx_vec_f16_to_f32(vsrc[i]); \
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HVX_Vector r0 = Q6_Vsf_equals_Vqf32(Q6_Vqf32_vadd_Vqf32Vsf(Q6_Vqf32_vmpy_VsfVsf(Q6_V_lo_W(p), vs), vo)); \
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HVX_Vector r1 = Q6_Vsf_equals_Vqf32(Q6_Vqf32_vadd_Vqf32Vsf(Q6_Vqf32_vmpy_VsfVsf(Q6_V_hi_W(p), vs), vo)); \
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HVX_Vector v = hvx_vec_f32_to_f16(r0, r1); \
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vec_store((void *) &vdst[i], nloe * SIZEOF_FP16, v); \
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} \
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} while(0)
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static inline void hvx_scale_offset_f16_aa(uint8_t * restrict dst, const uint8_t * restrict src, const int n, const float scale, const float offset) {
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assert((size_t) dst % 128 == 0);
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assert((size_t) src % 128 == 0);
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hvx_scale_offset_f16_loop_body(HVX_Vector, HVX_Vector, hvx_vec_store_a);
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}
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static inline void hvx_scale_offset_f16_au(uint8_t * restrict dst, const uint8_t * restrict src, const int n, const float scale, const float offset) {
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assert((size_t) dst % 128 == 0);
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hvx_scale_offset_f16_loop_body(HVX_Vector, HVX_UVector, hvx_vec_store_a);
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}
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static inline void hvx_scale_offset_f16_ua(uint8_t * restrict dst, const uint8_t * restrict src, const int n, const float scale, const float offset) {
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assert((size_t) src % 128 == 0);
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hvx_scale_offset_f16_loop_body(HVX_UVector, HVX_Vector, hvx_vec_store_u);
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}
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static inline void hvx_scale_offset_f16_uu(uint8_t * restrict dst, const uint8_t * restrict src, const int n, const float scale, const float offset) {
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hvx_scale_offset_f16_loop_body(HVX_UVector, HVX_UVector, hvx_vec_store_u);
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}
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static inline void hvx_scale_offset_f16(uint8_t * restrict dst, const uint8_t * restrict src, const int n, const float scale, const float offset) {
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if (((size_t) dst & 127) == 0) {
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if (((size_t) src & 127) == 0) {
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hvx_scale_offset_f16_aa(dst, src, n, scale, offset);
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} else {
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hvx_scale_offset_f16_au(dst, src, n, scale, offset);
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}
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} else {
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if (((size_t) src & 127) == 0) {
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hvx_scale_offset_f16_ua(dst, src, n, scale, offset);
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} else {
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hvx_scale_offset_f16_uu(dst, src, n, scale, offset);
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}
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}
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}
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#endif // HVX_SCALE_H
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